? e98335b1z sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. absolute maximum ratings (ta=25 ?) supply voltage v dd 4.5 v input power p in +5 dbm operating temperature topr ?5 to +85 ? storage temperature tstg ?5 to +150 ? recommended operating condition supply voltage v dd 2.7 to 3.3 v description the CXG1061TN is a low noise down conversion mixer mmic for phs. this ic is designed using the sony? gaas j-fet process. features high gain gc=22 db (typ.) low distortion input ip3=?3 dbm (typ.) low lo input power operation p lo =?5 dbm high image suppression ratio imr=27 dbc (typ.) lo input matching circuit single 3 v power supply operation 10-pin tssop package function frequency conversion applications japan digital cordless telephones (phs) structure gaas j-fet mmic low noise down conversion mixer for phs 10 pin tssop (plastic) CXG1061TN block diagram pin configuration rf in if out if amp mix aa aa lo amp lo in 1 aa aa aa aa 5 7 rf amp if out /v dd (mix, if amp) cap gnd cap lo in 1 2 3 4 5 10 9 8 7 6 rf in cap gnd v dd (lo amp) v dd (rf amp)
2 CXG1061TN electrical characteristics v dd =3.0 v, f rf =1.9 ghz, f lo =1.66 ghz, p lo = 15 dbm, rf input and if output 50 ? matching; unless otherwise specified (ta=25 c) item current consumption conversion gain noise figure input ip3 image suppression ratio 1/2 if suppression ratio lo to rf leak level lo input vswr symbol i dd gc nf iip3 imr 1/2ifr p lk vswr lo min. 19.5 15.5 22 35 typ. 7 22 3.3 13 27 40 46 2 max. 9 24.5 4.5 41 3.5 unit ma db db dbm dbc dbc dbm measurement condition when no signal when a small signal when a small signal p rf = 40 dbm offset=600 khz conversion by the im3 suppression ratio for two-wave input when p rf = 40 dbm input when p rf = 40 dbm input recommended evaluation board l1 c4 c6 c3 lo in 50 ? rf in 50 ? c1 c2 v dd (lo amp) c5 v dd (mix, if amp) 1 2 3 5 4 v dd rf in cap gnd v dd if out cap gnd cap lo in c10 c9 l2 c7 c8 v dd (rf amp) 6 7 8 9 10 l3 l4 if out 50 ? l1 l2 l3 l4 c1 c2 c3 82 nh 3.9 nh 12 nh 10 nh 18 pf 1000 pf 18 pf c4 c5 c6 c7 c8 c9 c10 5 pf 1000 pf 0.1 f 13 pf 1000 pf 3 pf 1000 pf (note) the values shown above are the specified values on the sony s recommended evaluation board.
3 CXG1061TN example of representative characteristics (ta=25 c) p out , im3 vs. p in 20 0 20 40 60 80 50 40 30 20 p out -if output power [dbm] p in -rf input power [dbm] 25 20 15 10 5 gc, nf vs. p lo p lo -lo input power [dbm] gc-conversion gain [db] 25 23 21 19 17 15 7 6 5 4 3 2 nf-noise figure [db] gc nf 25 20 15 10 50 iip3, p lk vs. p lo p lo -lo input power [dbm] iip3-input ip3 [dbm] 10 12 14 16 18 20 30 35 40 45 50 55 p lk -lo-rf leak level [dbm] iip3 p lk 10 0 v dd =3.0v f rf =1.90ghz f lo =1.66ghz v dd =3.0v f rf =1.90ghz f lo =1.66ghz v dd =3.0v f rf1 =1.90ghz f rf2 =1.9006ghz f lo =1.66ghz p lo = 15dbm p out im3
4 CXG1061TN recommended evaluation board front sony CXG1061TN evb c8 c7 l2 c9 c10 c1 c2 l4 c6 c3 c4 c5 l1 lo in if out 25mm l3 rf in v dd (rf amp) v dd (lo amp) gnd v dd (mix, if amp) v dd (mix, if amp) gnd v dd (lo amp) v dd (rf amp) glass fabric-base 4-layer epoxy board (thickness: 0.3 mm 2) gnd for the 2nd and 3rd layers back
sony code eiaj code jedec code package material lead treatment lead material package mass epoxy resin solder plating copper alloy package structure 0.22 0.07 0.5 5 1.2max ? 2.8 0.1 10 6 ? 2.2 0.1 3.2 0.2 0.1 0.05 + 0.15 0.45 0.15 0 to 10 1 a (0.2) 0.22 0.07 + 0.08 (0.1) 0.12 0.015 + 0.025 detail a 0.02g tssop-10p-l01 10pin tssop(plastic) 0.1 0.1 m note: dimension ? does not include mold protrusion. 0.25 + 0.08 package outline unit : mm CXG1061TN 5 sony corporation lead plating specifications item lead material copper alloy solder composition sn-bi bi:1-4wt% plating thickness 5-18 m spec. sony code eiaj code jedec code package material lead treatment lead material package mass epoxy resin solder plating copper alloy package structure 0.22 0.07 0.5 5 1.2max ? 2.8 0.1 10 6 ? 2.2 0.1 3.2 0.2 0.1 0.05 + 0.15 0.45 0.15 0 to 10 1 a (0.2) 0.22 0.07 + 0.08 (0.1) 0.12 0.015 + 0.025 detail a 0.02g tssop-10p-l01 10pin tssop(plastic) 0.1 0.1 m note: dimension ? does not include mold protrusion. 0.25 + 0.08 kokubu ass'y
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